찾을 수 없음 -lgcc

hello-world 이후 다음 기본 C 프로그램을 컴파일하려고 합니다. 여기에는 두 개의 지원 모듈이 포함되어 있습니다. Mac의 VirtualBox를 통해 가상 머신에서 Ubuntu를 실행하고 있습니다. 모든 것이 최신이지만 빌드할 수 없는 것 같습니다.

/usr/bin/ld: skipping incompatible /usr/lib/gcc/x86_64-linux-gnu/4.8/libgcc.a when searching for -lgcc
/usr/bin/ld: cannot find -lgcc
/usr/bin/ld: skipping incompatible /usr/lib/gcc/x86_64-linux-gnu/4.8/libgcc_s.so when searching for -lgcc_s
/usr/bin/ld: cannot find -lgcc_s
collect2: error: ld returned 1 exit status

나는 또한 makefile을 배우고 있기 때문에 아마도 뭔가 잘못된 것이 있을 것입니다. main포함 및 을 b연결 c하려고 합니다 .<stdlib.h><math.h>

내 거 makefile:

# Specify the C complier
CC = gcc

# List the compiler flags you want to pass to the compiler
#  -g            compile with debug information
#  -Wall         give all diagnostic warnings
#  -pedantic     require compliance with ANSI standard
#  -O0           do not optimize generated code
#  -std=gnu99    use the Gnu C99 standard language definition
#  -m32          emit code for IA32 architecture
#  -D_GNU_SOURCE use GNU library extension
#  -v            verbose, display detailed information about the exact
#                sequence of commands used to compile and link a program
CFLAGS = -g -Wall -pedantic -O0 -std=gnu99 -m32 -D_GNU_SOURCE

# The LDFLAGS variable sets flags for linker
#  -lm    link in libm (math library)
#  -m32   link with IA32 libraries
LDFLAGS = -lm -m32

# In this section, list the files that are part of the project.
# If you add/change names of header/source files, here is where you
# edit the makefile.
# List your c header files
HEADERS = c.h b.h
# List your c source files
SOURCES = c.c b.c main.c
OBJECTS = $(SOURCES:.c=.o)
# List your libraries
#LIBRARIES = -L.
# specify the build target (what is your program name?)
TARGET = validator

# The first target defined in the makefile is the one
# used when make is invoked with no argument. Given the definitions
# above, this makefile file will build the one named TARGET and
# assume that it depends on all the named OBJECTS files.
default: $(TARGET)

$(TARGET) : $(OBJECTS) makefile.dependencies
    $(CC) $(CFLAGS) -o $@ $(OBJECTS) $(LDFLAGS) $(LIBRARIES)

# In make's default rules, a .o automatically depends on its .c file
# (so editing the .c will cause recompilation into its .o file).
# The line below creates additional dependencies, most notably that it
# will cause the .c to be recompiled if any included .h file changes.
makefile.dependencies:: $(SOURCES) $(HEADERS)
    $(CC) $(CFLAGS) -MM $(SOURCES) > makefile.dependencies

-include makefile.dependencies

# Phony means not a "real" target, it doesn't build anything
# The phony target "clean" that is used to remove all compiled object files.
.PHONY: clean

clean:
    @rm -f $(TARGET) $(OBJECTS) core makefile.dependencies