x64 데비안에서는 gcc를 사용할 수 없습니다:

$ gcc a.cpp
Assembler messages:
Fatal error: No compiled in support for x86_64

어떻게 해야 합니까? 어떤 사람들은 binutils 설치를 제안하지만 이미 설치되어 있습니다.

(-m64를 추가해도 아무 것도 변경되지 않습니다). 이 소식은 어디에서 왔습니까?

a.cpp는 단지 빈 파일입니다.

--help=대상 지정됨

The following options are target specific:
  -m128bit-long-double        sizeof(long double) is 16
  -m32                        Generate 32bit i386 code
  -m3dnow                     Support 3DNow! built-in functions
  -m3dnowa                    Support Athlon 3Dnow! built-in functions
  -m64                        Generate 64bit x86-64 code
  -m80387                     Use hardware fp
  -m8bit-idiv                 Expand 32bit/64bit integer divide into 8bit
                              unsigned integer divide with run-time check
  -m96bit-long-double         sizeof(long double) is 12
  -mabi=                      Generate code that conforms to the given ABI
  -mabm                       Support code generation of Advanced Bit
                              Manipulation (ABM) instructions.
  -maccumulate-outgoing-args  Reserve space for outgoing arguments in the
                              function prologue
  -maes                       Support AES built-in functions and code generation
  -malign-double              Align some doubles on dword boundary
  -malign-functions=          Function starts are aligned to this power of 2
  -malign-jumps=              Jump targets are aligned to this power of 2
  -malign-loops=              Loop code aligned to this power of 2
  -malign-stringops           Align destination of the string operations
  -mandroid                   Generate code for the Android platform.
  -march=                     Generate code for given CPU
  -masm=                      Use given assembler dialect
  -mavx                       Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
                              SSE4.2 and AVX built-in functions and code
                              generation
  -mavx2                      Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
                              SSE4.2, AVX and AVX2 built-in functions and code
                              generation
  -mavx256-split-unaligned-load Split 32-byte AVX unaligned load
  -mavx256-split-unaligned-store Split 32-byte AVX unaligned store
  -mbionic                    Use Bionic C library
  -mbmi                       Support BMI built-in functions and code generation
  -mbmi2                      Support BMI2 built-in functions and code
                              generation
  -mbranch-cost=              Branches are this expensive (1-5, arbitrary units)
  -mcld                       Generate cld instruction in the function prologue.
  -mcmodel=                   Use given x86-64 code model
  -mcpu=                      This switch lacks documentation
  -mcrc32                     Support code generation of crc32 instruction.
  -mcx16                      Support code generation of cmpxchg16b instruction.
  -mdispatch-scheduler        Do dispatch scheduling if processor is bdver1 or
                              bdver2 and Haifa scheduling is selected.
  -mf16c                      Support F16C built-in functions and code
                              generation
  -mfancy-math-387            Generate sin, cos, sqrt for FPU
  -mfentry                    Emit profiling counter call at function entry
                              before prologue.
  -mfma                       Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
                              SSE4.2, AVX and FMA built-in functions and code
                              generation
  -mfma4                      Support FMA4 built-in functions and code
                              generation 
  -mforce-drap                Always use Dynamic Realigned Argument Pointer
                              (DRAP) to realign stack
  -mfp-ret-in-387             Return values of functions in FPU registers
  -mfpmath=                   Generate floating point mathematics using given
                              instruction set
  -mfsgsbase                  Support FSGSBASE built-in functions and code
                              generation
  -mfused-madd                This switch lacks documentation
  -mglibc                     Use GNU C library
  -mhard-float                Use hardware fp
  -mieee-fp                   Use IEEE math for fp comparisons
  -mincoming-stack-boundary=  Assume incoming stack aligned to this power of 2
  -minline-all-stringops      Inline all known string operations
  -minline-stringops-dynamically Inline memset/memcpy string operations, but
                              perform inline version only for small blocks
  -mintel-syntax              This switch lacks documentation
  -mlarge-data-threshold=     Data greater than given threshold will go into
                              .ldata section in x86-64 medium model
  -mlwp                       Support LWP built-in functions and code
                              generation 
  -mlzcnt                     Support LZCNT built-in function and code
                              generation
  -mmmx                       Support MMX built-in functions
  -mmovbe                     Support code generation of movbe instruction.
  -mms-bitfields              Use native (MS) bitfield layout
  -mno-align-stringops        This switch lacks documentation
  -mno-fancy-math-387         This switch lacks documentation
  -mno-push-args              This switch lacks documentation
  -mno-red-zone               This switch lacks documentation
  -mno-sse4                   Do not support SSE4.1 and SSE4.2 built-in
                              functions and code generation
  -momit-leaf-frame-pointer   Omit the frame pointer in leaf functions
  -mpc32                      Set 80387 floating-point precision to 32-bit
  -mpc64                      Set 80387 floating-point precision to 64-bit
  -mpc80                      Set 80387 floating-point precision to 80-bit
  -mpclmul                    Support PCLMUL built-in functions and code
                              generation
  -mpopcnt                    Support code generation of popcnt instruction.
  -mprefer-avx128             Use 128-bit AVX instructions instead of 256-bit
                              AVX instructions in the auto-vectorizer.
  -mpreferred-stack-boundary= Attempt to keep stack aligned to this power of 2
  -mpush-args                 Use push instructions to save outgoing arguments
  -mrdrnd                     Support RDRND built-in functions and code
                              generation
  -mrecip                     Generate reciprocals instead of divss and sqrtss.
  -mrecip=                    Control generation of reciprocal estimates.
  -mred-zone                  Use red-zone in the x86-64 code
  -mregparm=                  Number of registers used to pass integer arguments
  -mrtd                       Alternate calling convention
  -msahf                      Support code generation of sahf instruction in
                              64bit x86-64 code.
  -msoft-float                Do not use hardware fp
  -msse                       Support MMX and SSE built-in functions and code
                              generation
  -msse2                      Support MMX, SSE and SSE2 built-in functions and
                              code generation
  -msse2avx                   Encode SSE instructions with VEX prefix
  -msse3                      Support MMX, SSE, SSE2 and SSE3 built-in
                              functions and code generation
  -msse4                      Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and
                              SSE4.2 built-in functions and code generation
  -msse4.1                    Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1
                              built-in functions and code generation
  -msse4.2                    Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and
                              SSE4.2 built-in functions and code generation
  -msse4a                     Support MMX, SSE, SSE2, SSE3 and SSE4A built-in
                              functions and code generation
  -msse5                      This switch lacks documentation
  -msseregparm                Use SSE register passing conventions for SF and
                              DF mode
  -mssse3                     Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in
                              functions and code generation
  -mstack-arg-probe           Enable stack probing
  -mstackrealign              Realign stack in prologue
  -mstringop-strategy=        Chose strategy to generate stringop using
  -mtbm                       Support TBM built-in functions and code generation
  -mtls-dialect=              Use given thread-local storage dialect
  -mtls-direct-seg-refs       Use direct references against %gs when accessing
                              tls data
  -mtune=                     Schedule code for given CPU
  -muclibc                    Use uClibc C library
  -mveclibabi=                Vector library ABI to use
  -mvect8-ret-in-mem          Return 8-byte vectors in memory
  -mvzeroupper                Generate vzeroupper instruction before a transfer
                              of control flow out of the function.
  -mx32                       Generate 32bit x86-64 code
  -mxop                       Support XOP built-in functions and code
                              generation 

  Known assembler dialects (for use with the -masm-dialect= option):
    att intel

  Known ABIs (for use with the -mabi= option):
    ms sysv

  Known code models (for use with the -mcmodel= option):
    32 kernel large medium small

  Valid arguments to -mfpmath=:
    387 387+sse 387,sse both sse sse+387 sse,387

  Known vectorization library ABIs (for use with the -mveclibabi= option):
    acml svml

  Valid arguments to -mstringop-strategy=:
    byte_loop libcall loop rep_4byte rep_8byte rep_byte unrolled_loop

  Known TLS dialects (for use with the -mtls-dialect= option):
    gnu gnu2